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400 MHz to 6 GHz Broadband Quadrature Modulator ADL5375
FEATURES
Output frequency range: 400 MHz to 6 GHz 1 dB output compression: 9.4 dBm from 450 MHz to 4 GHz Output return loss 14 dB from 450 MHz to 5.5 GHz Noise floor: -160 dBm/Hz @ 900 MHz Sideband suppression: <-50 dBc @ 900 MHz Carrier feedthrough: <-46 dBm @ 900 MHz Baseband input bias level ADL5375-05: 500 mV ADL5375-15: 1500 mV Single supply: 4.75 V to 5.25 V 24-lead LFCSP_VQ package
FUNCTIONAL BLOCK DIAGRAM
IBBP IBBN
ADL5375
LOIP LOIN
QUADRATURE PHASE SPLITTER
RFOUT DSOP
QBBN QBBP
07052-001
Figure 1.
APPLICATIONS
Cellular communication systems GSM/EDGE, CDMA2000, W-CDMA, TD-SCDMA WiMAX/broadband wireless access systems Satellite modems
GENERAL DESCRIPTION
The ADL5375 is a broadband quadrature modulator designed for operation from 400 MHz to 6 GHz. Its excellent phase accuracy and amplitude balance enable high performance intermediate frequency or direct radio frequency modulation for communication systems. The ADL5375 features a broad baseband bandwidth, along with an output gain flatness that varies no more than 1 dB from 450 MHz to 3.8 GHz. These features, coupled with a broadband output return loss of -14 dB, make the ADL5375 ideally suited for broadband zero IF or low IF-to-RF applications, broadband digital predistortion transmitters, and multiband radio designs. The ADL5375 accepts two differential baseband inputs and a single-ended LO. It generates a single-ended 50 output. The two versions offer input baseband bias levels of 500 mV (ADL5375-05) and 1500 mV (ADL5375-15). The ADL5375 is fabricated using an advanced silicon-germanium bipolar process. It is available in a 24-lead, exposed paddle, Pb-free, LFCSP_VQ package. Performance is specified over a -40C to +85C temperature range. A Pb-free evaluation board is also available.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2007 Analog Devices, Inc. All rights reserved.
ADL5375 TABLE OF CONTENTS
Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 7 ESD Caution .................................................................................. 7 Pin Configuration and Function Descriptions ............................. 8 Typical Performance Characteristics ............................................. 9 ADL5375-05 .................................................................................. 9 ADL5375-15 ................................................................................ 14 Theory of Operation ...................................................................... 19 Circuit Description..................................................................... 19 Basic Connections .......................................................................... 20 Power Supply and Grounding ................................................... 20 Baseband Inputs.......................................................................... 20 LO Input ...................................................................................... 20 RF Output .................................................................................... 20 Output Disable ............................................................................ 21 Optimization ................................................................................... 22 Applications Information .............................................................. 23 DAC Modulator Interfacing ..................................................... 23 Using the AD9779 Auxiliary DAC for Carrier Feedthrough Nulling ......................................................................................... 24 GSM/EDGE Operation ............................................................. 25 W-CDMA Operation................................................................. 25 LO Generation Using PLLs ....................................................... 26 Transmit DAC Options ............................................................. 26 Modulator/Demodulator Options ........................................... 26 Evaluation Board ............................................................................ 27 Thermal Grounding and Evaluation Board Layout............... 28 Characterization Setup .................................................................. 29 Outline Dimensions ....................................................................... 31 Ordering Guide .......................................................................... 31
REVISION HISTORY
12/07--Revision 0: Initial Version
Rev. 0 | Page 2 of 32
ADL5375 SPECIFICATIONS
VS = 5 V; TA = 25C; LO = 0 dBm single-ended drive; baseband I/Q amplitude = 1 V p-p differential sine waves in quadrature with a 500 mV (ADL5375-05) or 1500 mV (ADL5375-15) dc bias; baseband I/Q frequency (fBB) = 1 MHz, unless otherwise noted. Table 1.
Parameter OPERATING FREQUENCY RANGE Low frequency High frequency LO = 450 MHz Output Power, POUT Modulator Voltage Gain Output P1dB Output Return Loss Carrier Feedthrough Sideband Suppression Quadrature Error I/Q Amplitude Balance Second Harmonic ADL5375-05 ADL5375-15 Third Harmonic ADL5375-05 ADL5375-15 Output IP2 Output IP3 Noise Floor LO = 900 MHz Output Power, POUT Modulator Voltage Gain Output P1dB Output Return Loss Carrier Feedthrough Sideband Suppression Quadrature Error I/Q Amplitude Balance Second Harmonic ADL5375-05 ADL5375-15 Third Harmonic ADL5375-05 ADL5375-15 Output IP2 Output IP3 Noise Floor Conditions ADL5375-05 Min Typ Max 400 6000 VIQ = 1 V p-p differential RF output divided by baseband input voltage 0.87 -3.1 9.4 -14.7 -48.0 -33.1 2.52 -0.05 -74.5 ADL5375-15 Min Typ Max 400 6000 0.46 -3.5 9.9 -14.7 -52.2 -35.5 1.64 -0.07 -74.5 Unit MHz MHz dBm dB dBm dB dBm dBc Degrees dB dBc
POUT - (fLO + (2 x fBB)) POUT = 0.87 dBm POUT = 0.46 dBm POUT - (fLO + (3 x fBB)) POUT = 0.87 dBm POUT = 0.46 dBm f1BB = 3.5 MHz, f2BB = 4.5 MHz, POUT -5 dBm @ fLO = 900 MHz f1BB = 3.5 MHz, f2BB = 4.5 MHz, POUT -5 dBm @ fLO = 900 MHz I/Q inputs = 0 V differential with a dc bias only, 20 MHz carrier offset VIQ = 1 V p-p differential RF output divided by baseband input voltage
-51.3
-77.1
dBc
65.0 28.1 -160.5
67.9 23.0 -157.0
dBm dBm dBm/Hz
POUT - (fLO + (2 x fBB)) POUT = 0.87 dBm POUT = 0.47 dBm POUT - (fLO + (3 x fBB)) POUT = 0.87 dBm POUT = 0.47 dBm f1BB = 3.5 MHz, f2BB = 4.5 MHz, POUT -5 dBm @ fLO = 900 MHz f1BB = 3.5 MHz, f2BB = 4.5 MHz, POUT -5 dBm @ fLO = 900 MHz I/Q inputs = 0 V differential with a dc bias only, 20 MHz carrier offset
0.87 -3.1 9.4 -14.1 -46.2 -52.1 -0.29 -0.05 -73.3
0.47 -3.5 9.9 -14.1 -46.2 -50.4 -0.37 -0.07 -73
dBm dB dBm dB dBm dBc Degrees dB dBc
-51.5
-71
dBc
68.3 26.8 -160.0
66.2 22.9 -157.1
dBm dBm dBm/Hz
Rev. 0 | Page 3 of 32
ADL5375
Parameter LO = 1900 MHz Output Power, POUT Modulator Voltage Gain Output P1dB Output Return Loss Carrier Feedthrough Sideband Suppression Quadrature Error I/Q Amplitude Balance Second Harmonic ADL5375-05 ADL5375-15 Third Harmonic ADL5375-05 ADL5375-15 Output IP2 Output IP3 Noise Floor LO = 2150 MHz Output Power, POUT Modulator Voltage Gain Output P1dB Output Return Loss Carrier Feedthrough Sideband Suppression Quadrature Error I/Q Amplitude Balance Second Harmonic ADL5375-05 ADL5375-15 Third Harmonic ADL5375-05 ADL5375-15 Output IP2 Output IP3 Noise Floor Conditions VIQ = 1 V p-p differential RF output divided by baseband input voltage ADL5375-05 Min Typ Max 1.01 -3.0 9.8 -14.1 -40.5 -54.2 -0.24 -0.05 -67 ADL5375-15 Min Typ Max 0.63 -3.4 10.4 -13.6 -39.0 -51.3 -0.15 -0.08 -73 Unit dBm dB dBm dB dBm dBc Degrees dB dBc
POUT - (fLO + (2 x fBB)) POUT = 1.01 dBm POUT = 0.63 dBm POUT - (fLO + (3 x fBB)) POUT = 1.01 dBm POUT = 0.63 dBm f1BB = 3.5 MHz, f2BB = 4.5 MHz, POUT -5 dBm @ fLO = 900 MHz f1BB = 3.5 MHz, f2BB = 4.5 MHz, POUT -5 dBm @ fLO = 900 MHz I/Q inputs = 0 V differential with a dc bias only, 20 MHz carrier offset VIQ = 1 V p-p differential RF output divided by baseband input voltage
-52
-62
dBc
62.7 24.6 -160.0
63.8 22.1 -158.2
dBm dBm dBm/Hz
POUT - (fLO + (2 x fBB)) POUT = 1.05 dBm POUT = 0.67 dBm POUT - (fLO + (3 x fBB)) POUT = 1.05 dBm POUT = 0.67 dBm f1BB = 3.5 MHz, f2BB = 4.5 MHz, POUT -5 dBm @ fLO = 900 MHz f1BB = 3.5 MHz, f2BB = 4.5 MHz, POUT -5 dBm @ fLO = 900 MHz I/Q inputs = 0 V differential with a dc bias only, 20 MHz carrier offset
1.05 -2.9 10.0 -14.2 -40.6 -45.0 -0.72 -0.04 -68
0.67 -3.3 10.4 -13.9 -37.9 -44.7 -0.58 -0.06 -62
dBm dB dBm dB dBm dBc Degrees dB dBc
-53
-63
dBc
58.7 25.7 -159.5
55.8 22.1 -157.9
dBm dBm dBm/Hz
Rev. 0 | Page 4 of 32
ADL5375
Parameter LO = 2600 MHz Output Power, POUT Modulator Voltage Gain Output P1dB Output Return Loss Carrier Feedthrough Sideband Suppression Quadrature Error I/Q Amplitude Balance Second Harmonic ADL5375-05 ADL5375-15 Third Harmonic ADL5375-05 ADL5375-15 Output IP2 Output IP3 Noise Floor LO = 3500 MHz Output Power, POUT Modulator Voltage Gain Output P1dB Output Return Loss Carrier Feedthrough Sideband Suppression Quadrature Error I/Q Amplitude Balance Second Harmonic ADL5375-05 ADL5375-15 Third Harmonic ADL5375-05 ADL5375-15 Output IP2 Output IP3 Noise Floor Conditions VIQ = 1 V p-p differential RF output divided by baseband input voltage ADL5375-05 Min Typ Max 1.18 -2.8 10.3 -15.1 -41.0 -44.3 -0.72 -0.04 -57 ADL5375-15 Min Typ Max 0.78 -3.2 10.6 -14.5 -42.3 -45.6 -0.60 -0.07 -55 Unit dBm dB dBm dB dBm dBc Degrees dB dBc
POUT - (fLO + (2 x fBB)) POUT = 1.18 dBm POUT = 0.78 dBm POUT - (fLO + (3 x fBB)) POUT = 1.18 dBm POUT = 0.78 dBm f1BB = 3.5 MHz, f2BB = 4.5 MHz, POUT -5 dBm @ fLO = 900 MHz f1BB = 3.5 MHz, f2BB = 4.5 MHz, POUT -5 dBm @ fLO = 900 MHz I/Q inputs = 0 V differential with a dc bias only, 20 MHz carrier offset VIQ = 1 V p-p differential RF output divided by baseband input voltage
-52
-52
dBc
49.0 21.8 -159.0
48.5 19.4 -157.6
dBm dBm dBm/Hz
POUT - (fLO + (2 x fBB)) POUT = 1.71 dBm POUT = 1.14 dBm POUT - (fLO + (3 x fBB)) POUT = 1.71 dBm POUT = 1.14 dBm f1BB = 3.5 MHz, f2BB = 4.5 MHz, POUT -5 dBm @ fLO = 900 MHz f1BB = 3.5 MHz, f2BB = 4.5 MHz, POUT -5 dBm @ fLO = 900 MHz I/Q inputs = 0 V differential with a dc bias only, 20 MHz carrier offset
1.71 -2.3 10.4 -21.6 -30.5 -49.3 -0.20 -0.07 -54
1.14 -2.8 10.1 -20.4 -29.0 -44.9 -0.54 -0.08 -61
dBm dB dBm dB dBm dBc Degrees dB dBc
-53
-51
dBc
50.0 23.8 -157.6
57.9 19.5 -156.3
dBm dBm dBm/Hz
Rev. 0 | Page 5 of 32
ADL5375
Parameter LO = 5800 MHz Output Power, POUT Modulator Voltage Gain Output P1dB Output Return Loss Carrier Feedthrough Sideband Suppression Quadrature Error I/Q Amplitude Balance Second Harmonic ADL5375-05 ADL5375-15 Third Harmonic ADL5375-05 ADL5375-15 Output IP2 Output IP3 Noise Floor LO INPUTS LO Drive Level Input Return Loss Conditions VIQ = 1 V p-p differential RF output divided by baseband input voltage ADL5375-05 Min Typ Max 2.40 -1.6 5.7 -11.4 -23.0 -36.0 -1.42 0.20 -57 ADL5375-15 Min Typ Max 0.82 -3.2 6.6 -10.5 -16.3 -33.0 +1.17 0.50 -58 Unit dBm dB dBm dB dBm dBc Degrees dB dBc
POUT - (fLO + (2 x fBB)) POUT = 2.40 dBm POUT = 0.82 dBm POUT - (fLO + (3 x fBB)) POUT = 2.40 dBm POUT = 0.82 dBm f1BB = 3.5 MHz, f2BB = 4.5 MHz, POUT -5 dBm @ fLO = 900 MHz f1BB = 3.5 MHz, f2BB = 4.5 MHz, POUT -5 dBm @ fLO = 900 MHz I/Q inputs = 0 V differential with a dc bias only, 20 MHz carrier offset Characterization performed at typical level 500 MHz < fLO < 3.3 GHz See Figure 7 and Figure 32 for return loss vs. frequency Pin IBBP, Pin IBBN, Pin QBBP, Pin QBBN Current sourcing from each baseband input -6
-43
-52
dBc
38.7 13.5 -153.0
35.7 12.1 -153.4
dBm dBm dBm/Hz
0 -10
+7
-6
0 -10
+7
dBm dB
BASEBAND INPUTS I/Q Input Bias Level Input Bias Current Input Offset Current Differential Input Impedance Bandwidth (0.1 dB) OUTPUT DISABLE Off Isolation Turn-On Settling Time Turn-Off Settling Time DSOP High Level (Logic 1) DSOP Low Level (Logic 0) POWER SUPPLIES Voltage Supply Current
500 41 0.1 60 95
1500 32 0.1 100 80
mV A A k MHz
LO = 1900 MHz, baseband input = 500 mV p-p sine wave Pin DSOP POUT (DSOP high) - POUT (DSOP low) DSOP low, LO leakage, LO = 2150 MHz DSOP high to low (90% of envelope) DSOP low to high (10% of envelope) 2.0
86 -53 200 100 2.0 0.8
85 -53 200 100 0.8 4.75 200 131 5.25
dB dBm ns ns V V V mA mA
Pin VPS1 and Pin VPS2 4.75 DSOP = high DSOP = low 200 131 5.25
Rev. 0 | Page 6 of 32
ADL5375 ABSOLUTE MAXIMUM RATINGS
Table 2.
Parameter Supply Voltage, VPOS IBBP, IBBN, QBBP, QBBN LOIP and LOIN Internal Power Dissipation ADL5375-05 ADL5375-15 JA (Exposed Paddle Soldered Down)1 Maximum Junction Temperature Operating Temperature Range Storage Temperature Range
1
Rating 5.5 V 0 V to 2 V 13 dBm 1500 mW 1200 mW 54C/W 150C -40C to +85C -65C to +150C
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ESD CAUTION
Per JDEC standard JESD 51-2. For information on optimizing thermal impedance, see the Thermal Grounding and Evaluation Board Layout section.
Rev. 0 | Page 7 of 32
ADL5375 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
VPS2 COMM IBBN IBBP COMM COMM
DSOP 1 COMM 2 LOIP 3 LOIN 4 COMM 5 NC 6
24 23 22 21 20 19
ADL5375
TOP VIEW (Not to Scale)
18 17 16 15 14 13
VPS1 COMM RFOUT NC COMM NC
NC 7 COMM 8 QBBN 9 QBBP 10 COMM 11 COMM 12
Figure 2. Pin Configuration
Table 3. Pin Function Descriptions
Pin No. 1 2, 5, 8, 11, 12, 14, 17, 19, 20, 23 3, 4 Mnemonic DSOP COMM LOIP, LOIN Description Output Disable. A logic high on this pin disables the RF output. Connect this pin to ground or leave it floating to enable the output. Input Common Pins. Connect to the ground plane via a low impedance path. Local Oscillator Inputs. Single-ended operation: The LOIP pin is driven from the LO source through an ac-coupling capacitor while the LOIN pin is ac-coupled to ground through a capacitor. Differential operation: The LOIP and LOIN pins must be driven differentially through ac-coupling capacitors in this mode of operation. No Connect. These pins can be left open or tied to ground. Differential In-Phase and Quadrature Baseband Inputs. These high impedance inputs should be dc-biased to the recommended level depending on the version. ADL5375-05: 500 mV ADL5375-15: 1500 mV These inputs should be driven from a low impedance source. Nominal characterized ac signal swing is 500 mV p-p on each pin. This results in a differential drive of 1 V p-p. These inputs are not self-biased and have to be externally biased. RF Output. Single-ended, 50 internally biased RF output. RFOUT must be ac-coupled to the load. Positive Supply Voltage Pins. All pins should be connected to the same supply (VS). To ensure adequate external bypassing, connect 0.1 F and 1000 pF capacitors between each pin and ground. Exposed Paddle. Connect to the ground plan via a low impedance path.
6, 7, 13, 15, 9, 10, 21, 22
NC QBBN, QBBP, IBBP, IBBN
16 18, 24
RFOUT VPS1, VPS2 EP
Rev. 0 | Page 8 of 32
07052-003
ADL5375 TYPICAL PERFORMANCE CHARACTERISTICS
ADL5375-05
VS = 5 V; TA = 25C; LO = 0 dBm single-ended drive; baseband I/Q amplitude = 1 V p-p differential sine waves in quadrature with a 500 mV dc bias; baseband I/Q frequency (fBB) = 1 MHz, unless otherwise noted.
5 4
12 VS = 5.25V
SSB OUTPUT POWER (dBm)
3 2 1 0 -1 -2 -3 -4 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
07052-052
TA = -40C
TA = +25C
1dB OUTPUT COMPRESSION (dBm)
10
VS = 5.0V
8
VS = 4.75V
TA = +85C
6
4
2
LO FREQUENCY (GHz)
LO FREQUENCY (GHz)
Figure 3. Single-Sideband (SSB) Output Power (POUT) vs. LO Frequency (fLO) and Temperature
5 4 VS = 5.0V VS = 5.25V
Figure 6. SSB Output 1dB Compression Point (OP1dB) vs. LO Frequency (fLO) and Supply
90 120 60
SSB OUTPUT POWER (dBm)
3 2 1 0 -1 -2 -3 -4 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
07052-053
VS = 4.75V
150
6G
30
180 450M 210
450M
0
6G 330
240 270
300
LO FREQUENCY (GHz)
Figure 4. Single-Sideband (SSB) Output Power (POUT) vs. LO Frequency (fLO) and Supply
12 TA = -40C
Figure 7. Smith Chart of LOIP (LOIN AC-Coupled to Ground) S11 and RFOUT S22 from 450 MHz to 6000 MHz
0 LOIP
1dB OUTPUT COMPRESSION (dBm)
10 TA = +85C
-10
RETURN LOSS (dB)
8
TA = +25C
6
-20
RFOUT
4
-30
2
07052-054
0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
LO FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 5. SSB Output 1dB Compression Point (OP1dB) vs. LO Frequency (fLO) and Temperature
Figure 8. Return Loss of LOIP (LOIN AC-Coupled to Ground) S11 and RFOUT S22 from 450 MHz to 6000 MHz
Rev. 0 | Page 9 of 32
07052-056
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
-40
07052-097
-5
S11 OF LO S22 OF OUTPUT
07052-055
-5
0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
ADL5375
ADL5375-05
0 -5
CARRIER FEEDTHROUGH (dBm)
0 -10
TA = +85C TA = +25C
-15 -20 -25 -30 -35 -40 -45 -50 -55 0 0.5 1.0 1.5 2.0 2.5 3.0
SIDEBAND SUPPRESSION (dBc)
-10
-20 -30 -40 -50 -60 -70 TA = +25C
07052-060
07052-062
TA = -40C TA = +85C
TA = -40C
3.5
4.0
4.5
5.0
5.5
6.0
07052-057
-60
-80
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
LO FREQUENCY (GHz)
LO FREQUENCY (GHz)
Figure 9. Carrier Feedthrough vs. LO Frequency (fLO) and Temperature; Multiple Devices Shown
0
Figure 12. Sideband Suppression vs. LO Frequency (fLO) and Temperature After Nulling at 25C; Multiple Devices Shown
0 10 SSB OUTPUT POWER (dBm)
SECOND-ORDER DISTORTION, THIRD-ORDER DISTORTION, CARRIER FEEDTHROUGH, AND SIDEBAND SUPPRESSION (dBc)
-10
CARRIER FEEDTHROUGH (dBm)
-10 -20 -30 -40 -50 -60 -70 -80 -90 -100 0.06 0.1
-20 TA = +85C -30 -40 -50 -60 -70 -80 TA = -40C TA = +25C
CARRIER FEEDTHROUGH (dBm)
0
-5 SIDEBAND SUPPRESSION (dBc) -10 THIRD-ORDER DISTORTION (dBc) SECOND-ORDER DISTORTION (dBc) 1 BASEBAND INPUT VOLTAGE (V rms) 2
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
LO FREQUENCY (GHz)
07052-058
Figure 10. Carrier Feedthrough vs. LO Frequency (fLO) and Temperature After Nulling at 25C; Multiple Devices Shown
0
Figure 13. Second- and Third-Order Distortion, Carrier Feedthrough, Sideband Suppression, and SSB POUT vs. Baseband Differential Input Level (fLO = 900 MHz)
0
SECOND-ORDER DISTORTION, THIRD-ORDER DISTORTION, CARRIER FEEDTHROUGH, AND SIDEBAND SUPPRESSION (dBc)
10 SSB OUTPUT POWER (dBm) CARRIER FEEDTHROUGH (dBm) 0
-10
SIDEBAND SUPPRESSION (dBc)
-10 -20 -30 -40 -50 -60 -70 -80 -90 -100 0.06 0.1
-20 TA = +85C -30 -40 -50 -60 TA = -40C -70 -80 TA = +25C
-5 SIDEBAND SUPPRESSION (dBc) THIRD-ORDER DISTORTION (dBc) SECOND-ORDER DISTORTION (dBc) -10
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
07052-059
1 BASEBAND INPUT VOLTAGE (V rms)
2
-15
LO FREQUENCY (GHz)
Figure 11. Sideband Suppression vs. LO Frequency (fLO) and Temperature; Multiple Devices Shown
Figure 14. Second- and Third-Order Distortion, Carrier Feedthrough, Sideband Suppression, and SSB POUT vs. Baseband Differential Input Level (fLO = 2150 MHz)
Rev. 0 | Page 10 of 32
SSB OUTPUT POWER (dBm)
5
07052-061
-15
SSB OUTPUT POWER (dBm)
5
ADL5375
ADL5375-05
0
SECOND-ORDER DISTORTION, THIRD-ORDER DISTORTION, CARRIER FEEDTHROUGH, AND SIDEBAND SUPPRESSION (dBc)
10
OUTPUT THIRD-ORDER INTERCEPT (dBm)
30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
07052-087
-10 -20 -30 -40 -50 -60 -70 -80 -90 -100 0.06
SSB OUTPUT POWER (dBm)
SSB OUTPUT POWER (dBm)
CARRIER FEEDTHROUGH (dBm)
5
0
TA = -40C
TA = +25C TA = +85C
-5 SIDEBAND SUPPRESSION (dBc) SECOND-ORDER DISTORTION (dBc) -10 THIRD-ORDER DISTORTION (dBc) 0.1 BASEBAND INPUT VOLTAGE (V rms) 1 2
07052-063
-15
0
LO FREQUENCY (GHz)
Figure 15. Second- and Third-Order Distortion, Carrier Feedthrough, Sideband Suppression, and SSB POUT vs. Baseband Differential Input Level (fLO = 3500 MHz)
0 -10
Figure 18. OIP3 vs. LO Frequency (fLO) and Temperature (POUT -5 dBm @ fLO = 900 MHz)
80
OUTPUT SECOND-ORDER INTERCEPT (dBm)
SECOND-ORDER DISTORTION AND THIRD-ORDER DISTORTION (dBc)
70 60 50 40 30 20 10
07052-088
-20 TA = +25C -30 -40 -50 -60 -70 -80 SECOND-ORDER TA = +85C THIRD-ORDER TA = -40C
TA = -40C
TA = +25C TA = +85C
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
07052-064
0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
LO FREQUENCY (GHz)
LO FREQUENCY (GHz)
Figure 16. Second- and Third-Order Distortion vs. LO Frequency (fLO) and Temperature (Baseband I/Q Amplitude = 1 V p-p Differential)
-20 SSB OUTPUT POWER (dBm) 1.5
Figure 19. OIP2 vs. LO Frequency (fLO) and Temperature (POUT -5 dBm @ fLO = 900 MHz)
-20
SECOND-ORDER DISTORTION, THIRD-ORDER DISTORTION, CARRIER FEEDTHROUGH, AND SIDEBAND SUPPRESSION (dBc)
2 SSB OUTPUT POWER (dBm)
SECOND-ORDER DISTORTION, CARRIER FEEDTHROUGH, SIDEBAND SUPPRESSION
SSB OUTPUT POWER (dBm)
-40
CARRIER FEEDTHROUGH (dBm)
0
-40
-0.5
-50 THIRD-ORDER DISTORTION (dBc) SECOND-ORDER DISTORTION (dBc)
-1
-50
SIDEBAND SUPPRESSION (dBc)
-1.5
-60
SIDEBAND SUPPRESSION (dBc)
-2
-60 SECOND-ORDER DISTORTION (dBc) 1 10 BASEBAND FREQUENCY (MHz)
-2.5
-70
-3
07052-098
-70
LO AMPLITUDE (dBm)
Figure 17. Second-Order Distortion, Carrier Feedthrough, Sideband Suppression, and SSB POUT vs. Baseband Frequency (fBB); fLO = 2140 MHz
Figure 20. Second- and Third-Order Distortion, Carrier Feedthrough, Sideband Suppression, and SSB POUT vs. LO Amplitude (fLO = 900 MHz)
Rev. 0 | Page 11 of 32
07052-065
-3.5 100
-80
-6
-4
-2
0
2
4
6
-4
SSB OUTPUT POWER (dBm)
-30
CARRIER FEEDTHROUGH (dBm)
0.5
-30
1
ADL5375
ADL5375-05
-20
SECOND-ORDER DISTORTION, THIRD-ORDER DISTORTION, CARRIER FEEDTHROUGH, AND SIDEBAND SUPPRESSION (dBc)
SSB OUTPUT POWER (dBm) CARRIER FEEDTHROUGH (dBm)
2
230 225
-30
1
SSB OUTPUT POWER (dBm)
220
SUPPLY CURRENT (mA)
-40
0
215 210 205 200 195 190 185
VS = 5.25V
-50 SIDEBAND SUPPRESSION (dBc) THIRD-ORDER DISTORTION (dBc) -70 SECOND-ORDER DISTORTION (dBc) -6 -4 -2 0 2 4 6
-1
VS = 5.0V
-60
-2
-3
VS = 4.75V
07052-066
-40
25 TEMPERATURE (C)
85
LO AMPLITUDE (dBm)
Figure 21. Second- and Third-Order Distortion, Carrier Feedthrough, Sideband Suppression, and SSB POUT vs. LO Amplitude (fLO = 2150 MHz)
-10
SECOND-ORDER DISTORTION, THIRD-ORDER DISTORTION, CARRIER FEEDTHROUGH, AND SIDEBAND SUPPRESSION (dBc)
Figure 23. Power Supply Current vs. Temperature
18 16
2 SSB OUTPUT POWER (dBm)
-20
SSB OUTPUT POWER (dBm)
CARRIER FEEDTHROUGH (dBm)
1
14 12
QUANTITY
-30
0
-40
SIDEBAND SUPPRESSION (dBc)
-1
10 8 6 4 2
-50
-2
-60
THIRD-ORDER DISTORTION (dBc) -6 -4 -2 0
-3 SECOND-ORDER DISTORTION (dBc)
07052-067
-70
LO AMPLITUDE (dBm)
NOISE (dBm/Hz)
Figure 22. Second- and Third-Order Distortion, Carrier Feedthrough, Sideband Suppression, and SSB POUT vs. LO Amplitude (fLO = 3500 MHz)
Figure 24. 20 MHz Offset Noise Floor Distribution at fLO = 900 MHz (I/Q Amplitude = 0 mV p-p with 500 mV DC Bias)
Rev. 0 | Page 12 of 32
07052-089
2
4
6
-4
0 -160.5 -160.3 -160.1 -159.9 -159.7 -159.5 -159.3 -159.1
07052-068
-80
-4
180
ADL5375
ADL5375-05
8
SSB OUTPUT POWER ISOLATION (dB) 90 88 SSB OUTPUT POWER ISOLATION (dB) 86 84 82 80 CARRIER FEEDTHROUGH (dBm) 78 76 74 -60 -70
07052-091
0 -10 -20 -30 -40 -50 CARRIER FEEDTHROUGH (dBm)
7 6 5 4 3 2 1
07052-090
QUANTITY
0 -160.5
-160.1
-159.7
-159.3
-158.9
-158.5
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
-80 6.0
NOISE (dBm/Hz)
LO FREQUENCY (GHz)
Figure 25. 20 MHz Offset Noise Floor Distribution at fLO = 2140 MHz (I/Q Amplitude = 0 mV p-p with 500 mV DC Bias)
10 9 8 7
QUANTITY
Figure 27. SSB POUT Isolation and Carrier Feedthrough with DSOP High
6 5 4 3 2 1 -158.9 -158.5 -158.1 -157.7 -157.3 -156.9 -156.5
07052-099
0
NOISE (dBm/Hz)
Figure 26. 20 MHz Offset Noise Floor Distribution at fLO = 3500 MHz (I/Q Amplitude = 0 mV p-p with 500 mV DC Bias)
Rev. 0 | Page 13 of 32
ADL5375
ADL5375-15
VS = 5 V; TA = 25C; LO = 0 dBm single-ended drive; baseband I/Q amplitude = 1 V p-p differential sine waves in quadrature with a 1500 mV dc bias; baseband I/Q frequency (fBB) = 1 MHz, unless otherwise noted.
5 4
SSB OUTPUT POWER (dBm)
12 VS = 5.25V
1dB OUTPUT COMPRESSION (dBm)
3 2 1 0 -1 -2 -3 -4
07052-069
10 VS = 4.75V
VS = 5.0V
TA = -40C
TA = +25C
8
TA = +85C
6
4
2
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
LO FREQUENCY (GHz)
LO FREQUENCY (GHz)
Figure 28. Single-Sideband (SSB) Output Power (POUT) vs. LO Frequency (fLO) and Temperature
5 4
SSB OUTPUT POWER (dBm)
Figure 31. SSB Output 1dB Compression Point (OP1dB) vs. LO Frequency (fLO) and Supply
90
VS = 5.25V
120
60
3 2 1 0 -1 -2 -3 -4 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
07052-070
150
6G
30
VS = 4.75V VS = 5.0V
180 450M 210 S11 OF LO S22 OF OUTPUT 240 270
07052-102
450M
0
6G
330
-5
300
LO FREQUENCY (GHz)
Figure 29. Single-Sideband (SSB) Output Power (POUT) vs. LO Frequency (fLO) and Supply
12
Figure 32. Smith Chart of LOIP (LOIN AC-Coupled to Ground) S11 and RFOUT S22 from 450 MHz to 6000 MHz
0
1dB OUTPUT COMPRESSION (dBm)
10 TA = +25C 8
TA = -40C
-10 LOIP
TA = +85C 6
RETURN LOSS (dB)
-20
RFOUT
4
-30
2
07052-071
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
LO FREQUENCY (GHz)
FREQUENCY (GHz)
Figure 30. SSB Output 1dB Compression Point (OP1dB) vs. LO Frequency (fLO) and Temperature
Figure 33. Return Loss of LOIP (LOIN AC-Coupled to Ground) S11 and RFOUT S22 from 450 MHz to 6000 MHz
Rev. 0 | Page 14 of 32
07052-073
0
-40
07052-072
-5
0
ADL5375
ADL5375-15
0 -5
CARRIER FEEDTHROUGH (dBm)
0 -10
-15 -20 -25 -30 -35 -40 -45 -50 -55
TA = +85C
SIDEBAND SUPPRESSION (dBc)
-10
-20 -30 -40 -50 -60 -70 -80 TA = +25C LO FREQUENCY (GHz)
TA = -40C
TA = -40C TA = +25C
TA = +85C
LO FREQUENCY (GHz)
07052-074
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
Figure 34. Carrier Feedthrough vs. LO Frequency (fLO) and Temperature; Multiple Devices Shown
0
Figure 37. Sideband Suppression vs. LO Frequency (fLO) and Temperature After Nulling at 25C; Multiple Devices Shown
0 10 SSB OUTPUT POWER (dBm)
SECOND-ORDER DISTORTION, THIRD-ORDER DISTORTION, CARRIER FEEDTHROUGH, AND SIDEBAND SUPPRESSION (dBc)
-10
CARRIER FEEDTHROUGH (dBm)
-10 -20 -30 -40 -50 -60 -70 -80 -90 -100 0.06 0.1
-20 -30 TA = +85C -40 -50 TA = +25C -60 -70 -80 TA = -40C
SIDEBAND SUPPRESSION (dBc)
0
-5 SECOND-ORDER DISTORTION (dBc) THIRD-ORDER DISTORTION (dBc) 2
-10
07052-075
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
LO FREQUENCY (GHz)
BASEBAND INPUT VOLTAGE (V rms)
Figure 35. Carrier Feedthrough vs. LO Frequency (fLO) and Temperature After Nulling at 25C; Multiple Devices Shown
0
Figure 38. Second- and Third-Order Distortion, Carrier Feedthrough, Sideband Suppression, and SSB POUT vs. Baseband Differential Input Level (fLO = 900 MHz)
0
-10
SECOND-ORDER DISTORTION, THIRD-ORDER DISTORTION, CARRIER FEEDTHROUGH, AND SIDEBAND SUPPRESSION (dBc)
-10 -20 -30 -40 -50 -60 -70 -80 -90
SSB OUTPUT POWER (dBm) CARRIER FEEDTHROUGH (dBm) SIDEBAND SUPPRESSION (dBc)
10
SIDEBAND SUPPRESSION (dBc)
TA = +85C -30 -40 -50 -60 -70 -80 TA = +25C TA = -40C
0
SECOND-ORDER DISTORTION (dBc) THIRD-ORDER DISTORTION (dBc)
-5
-10
07052-076
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
LO FREQUENCY (GHz)
2
BASEBAND INPUT VOLTAGE (V rms)
Figure 36. Sideband Suppression vs. LO Frequency (fLO) and Temperature; Multiple Devices Shown
Figure 39. Second- and Third-Order Distortion, Carrier Feedthrough, Sideband Suppression, and SSB POUT vs. Baseband Differential Input Level (fLO = 2150 MHz)
Rev. 0 | Page 15 of 32
07052-079
-100 0.06
0.1
1
-15
SSB OUTPUT POWER (dBm)
-20
5
07052-078
1
-15
SSB OUTPUT POWER (dBm)
CARRIER FEEDTHROUGH (dBm)
5
07052-077
-60
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
ADL5375
ADL5375-15
0 10
30
SECOND-ORDER DISTORTION, THIRD-ORDER DISTORTION, CARRIER FEEDTHROUGH, AND SIDEBAND SUPPRESSION (dBc)
-10 -20 -30 -40 -50 -60 -70 -80 -90
OUTPUT THIRD-ORDER INTERCEPT (dBm)
CARRIER FEEDTHROUGH (dBm) SIDEBAND SUPPRESSION (dBc)
SSB OUTPUT POWER (dBm)
28 26 24 22 20 18 16 14 12 10 8 6 4 2 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
07052-092
SSB OUTPUT POWER (dBm)
5
TA = -40C
0
SECOND-ORDER DISTORTION (dBc) THIRD-ORDER DISTORTION (dBc)
-5
TA = +25C TA = +85C
-10
0.1 BASEBAND INPUT VOLTAGE (V rms)
1
2
07052-080
-100 0.06
-15
0
LO FREQUENCY (GHz)
Figure 40. Second- and Third-Order Distortion, Carrier Feedthrough, Sideband Suppression, and SSB POUT vs. Baseband Differential Input Level (fLO = 3500 MHz)
0 -10
Figure 43. OIP3 vs. LO Frequency (fLO) and Temperature (POUT -5 dBm @ fLO = 900 MHz)
OUTPUT SECOND-ORDER INTERCEPT (dBm)
80 70 60 50 40 TA = +25C 30 20 10
07052-093
SECOND-ORDER DISTORTION AND THIRD-ORDER DISTORTION (dBc)
-20 -30 -40 -50 -60 -70 -80 TA = -40C SECOND-ORDER 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
07052-081
TA = -40C
TA = +25C
THIRD-ORDER
TA = +85C
TA = +85C
0
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
LO FREQUENCY (GHz)
LO FREQUENCY (GHz)
Figure 41. Second- and Third-Order Distortion vs. LO Frequency (fLO) and Temperature (Baseband I/Q Amplitude = 1 V p-p Differential)
-20 SSB OUTPUT POWER (dBm) -30 SIDEBAND SUPPRESSION (dBc) -40 -0.5 0.5 1.5
Figure 44. OIP3 vs. LO Frequency (fLO) and Temperature (POUT -5 dBm @ fLO = 900 MHz)
-20 2 SSB OUTPUT POWER (dBm) CARRIER FEEDTHROUGH (dBm)
SECOND-ORDER DISTORTION, THIRD-ORDER DISTORTION, CARRIER FEEDTHROUGH, AND SIDEBAND SUPPRESSION (dBc)
-30
1
SECOND-ORDER DISTORTION, CARRIER FEEDTHROUGH, SIDEBAND SUPPRESSION
SSB OUTPUT POWER (dBm)
-40
0
-50 SIDEBAND SUPPRESSION (dBc) SECOND-ORDER DISTORTION (dBc)
-1
-50
CARRIER FEEDTHROUGH (dBm)
-1.5
-60
THIRD-ORDER DISTORTION (dBc)
-2
-60 SECOND-ORDER DISTORTION (dBc) 1 10 BASEBAND FREQUENCY (MHz)
-2.5
-70
-3
07052-103
-6
-4
-2
0
2
4
6
LO AMPLITUDE (dBm)
Figure 42. Second-Order Distortion, Carrier Feedthrough, Sideband Suppression, and SSB POUT vs. Baseband Frequency (fBB); fLO = 2140 MHz
Figure 45. Second- and Third-Order Distortion, Carrier Feedthrough, Sideband Suppression, and SSB POUT vs. LO Amplitude (fLO = 900 MHz)
Rev. 0 | Page 16 of 32
07052-082
-70
-3.5 100
-80
-4
SSB OUTPUT POWER (dBm)
ADL5375
ADL5375-15
-20 2 CARRIER FEEDTHROUGH (dBm) -30 SSB OUTPUT POWER (dBm) 1 230 225
SECOND-ORDER DISTORTION, THIRD-ORDER DISTORTION, CARRIER FEEDTHROUGH, AND SIDEBAND SUPPRESSION (dBc)
SSB OUTPUT POWER (dBm)
220
SUPPLY CURRENT (mA)
-40
0
215 210 205 200 195 190 185
VS = 5.25V
VS = 5.0V
-50 SIDEBAND SUPPRESSION (dBc) -60
SECOND-ORDER DISTORTION (dBc)
-1
-2 THIRD-ORDER DISTORTION (dBc)
VS = 4.75V
-70
-3
-6
-4
-2
0
2
4
6
07052-083
-40
25 TEMPERATURE (C)
85
LO AMPLITUDE (dBm)
Figure 46. Second- and Third-Order Distortion, Carrier Feedthrough, Sideband Suppression, and SSB POUT vs. LO Amplitude (fLO = 2150 MHz)
-10
Figure 48. Power Supply Current vs. Temperature
18 16
SECOND-ORDER DISTORTION, THIRD-ORDER DISTORTION, CARRIER FEEDTHROUGH, AND SIDEBAND SUPPRESSION (dBc)
SSB OUTPUT POWER (dBm) CARRIER FEEDTHROUGH (dBm)
2
-20
1
SSB OUTPUT POWER (dBm)
14 12
-30 SIDEBAND SUPPRESSION (dBc)
0
QUANTITY
10 8 6 4 2
07052-094
-40
-1
-50 THIRD-ORDER DISTORTION (dBc) -60 SECOND-ORDER DISTORTION (dBc) -6 -4 -2 0 2 4 6
-2
-3
07052-084
-70
-4
0 -158.0 -157.8 -157.6 -157.4 -157.2 -157.0 -156.8 -156.6 NOISE (dBm/Hz)
LO AMPLITUDE (dBm)
Figure 47. Second- and Third-Order Distortion, Carrier Feedthrough, Sideband Suppression, and SSB POUT vs. LO Amplitude (fLO = 3500 MHz)
Figure 49. 20 MHz Offset Noise Floor Distribution at fLO = 900 MHz (I/Q Amplitude = 0 mV p-p with 1500 mV DC Bias)
Rev. 0 | Page 17 of 32
07052-085
-80
-4
180
ADL5375
ADL5375-15
12 90 0 -10 -20 -30 -40 -50 CARRIER FEEDTHROUGH (dBm) 78 76 74 -60 -70
07052-096
86 84 82 80
8
6
4
2
07052-095
0 -158.5 -158.3 -158.1 -157.9 -157.7 -157.5 -157.3 -157.1 NOISE (dBm/Hz)
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
-80 6.0
LO FREQUENCY (GHz)
Figure 50. 20 MHz Offset Noise Floor Distribution at fLO = 2140 MHz (I/Q Amplitude = 0 mV p-p with 1500 mV DC Bias)
9 8 7 6 QUANTITY 5 4 3 2 1 -157.5 -157.1 -156.7 -156.3 -155.9 -155.5
07052-104
Figure 52. SSB POUT Isolation and Carrier Feedthrough with DSOP High
0
NOISE (dBm/Hz)
Figure 51. 20 MHz Offset Noise Floor Distribution at fLO = 3500 MHz (I/Q Amplitude = 0 mV p-p with 500 mV DC Bias)
Rev. 0 | Page 18 of 32
CARRIER FEEDTHROUGH (dBm)
10
SSB OUTPUT POWER ISOLATION (dB)
88 SSB OUTPUT POWER ISOLATION (dB)
QUANTITY
ADL5375 THEORY OF OPERATION
CIRCUIT DESCRIPTION
The ADL5375 can be divided into five circuit blocks: the LO interface, the baseband voltage-to-current (V-to-I) converter, the mixers, the differential-to-single-ended (D-to-S) stage, and the bias circuit. A block diagram of the device is shown in Figure 53.
LOIP LOIN PHASE SPLITTER
V-to-I Converter
The differential baseband inputs (QBBP, QBBN, IBBN, and IBBP) present a high impedance. The voltages applied to these pins drive the V-to-I stage that converts baseband voltages into currents. The differential output currents of the V-to-I stages feed each of their respective mixers. The dc common-mode voltage at the baseband inputs sets the currents in the two mixer cores. Varying the baseband common-mode voltage influences the current in the mixer and affects overall modulator performance. The recommended dc voltage for the baseband common-mode voltage is 500 mV dc for the ADL5375-05 and 1500 mV for the ADL5375-15.
IBBP IBBN
QBBP QBBN
Mixers
RFOUT
07052-028
DSOP
Figure 53. Block Diagram
The LO interface generates two LO signals in quadrature. These signals are used to drive the mixers. The I/Q baseband input signals are converted to currents by the V-to-I stages, which then drive the two mixers. The outputs of these mixers combine to feed the output balun, which provides a singleended output. The bias cell generates reference currents for the V-to-I stage.
The ADL5375 has two double-balanced mixers: one for the in-phase channel (I channel) and one for the quadrature channel (Q-channel). The output currents from the two mixers sum together into an internal load. The signal developed across this load is used to drive the D-to-S stage.
D-to-S Stage
The output D-to-S stage consists of an on-chip active balun that converts the differential signal to a single-ended signal. The balun presents 50 impedance to the output (VOUT). Therefore, no matching network is needed at the RF output for optimal power transfer in a 50 environment.
LO Interface
The LO interface consists of a polyphase quadrature splitter and a limiting amplifier. The LO input impedance is set by the polyphase splitter. Each quadrature LO signal then passes through a limiting amplifier that provides the mixer with a limited drive signal. The LO input can be driven single-ended or differentially. For applications above 3 GHz, improved OIP2 and LO leakage may result from driving the LO input differentially.
Bias Circuit
An on-chip band gap reference circuit is used to generate a proportional-to-absolute temperature (PTAT) reference current for the V-to-I stage.
DSOP
The DSOP pin can be used to disable the output stage of the modulator. If the DSOP pin is connected to ground or left unconnected, the part operates normally. If the DSOP pin is connected to the positive voltage supply, the output stage is disabled and the LO leakage is also reduced.
Rev. 0 | Page 19 of 32
ADL5375 BASIC CONNECTIONS
IBBN IBBP VPOS VPOS S1
COMM
COMM
20
24
23
22
21
A
B DSOP
1 2 3 4 5 6 18
19
COMM
VPS2
IBBN
IBBP
C5 0.1F
C3 1000pF
VPS1 COMM RFOUT NC COMM NC
C2 1000pF
C4 0.1F
VPOS
C6 1000pF LOIP C7 1000pF
COMM LOIP LOIN COMM NC
Z1 ADL5375
17 16 15 14
RFOUT C1 1000pF
EXPOSED PADDLE
13
10
NC 7 COMM
COMM
COMM
QBBN
QBBP
12
11
8
9
GND
Figure 54. Basic Connections for the ADL5375
Figure 54 shows the basic connections for the ADL5375.
POWER SUPPLY AND GROUNDING
Pin VPS1 and Pin VPS2 should be connected to the same 5 V source. Each pin should be decoupled with a 100 pF and 0.1 F capacitor. These capacitors should be located as close as possible to the device. The power supply can range between 4.75 V and 5.25 V. The ten COMM pins should be tied to the same ground plane through low impedance paths. The exposed paddle on the underside of the package should also be soldered to a ground plane with low thermal and electrical impedance. If the ground plane spans multiple layers on the circuit board, they should be stitched together with nine vias under the exposed paddle as illustrated in the Evaluation Board section. The AN-772 application note discusses the thermal and electrical grounding of the LFCSP (QFN) package in detail.
All the baseband inputs must be externally dc biased. The recommended common-mode level is dependent on the version of the ADL5375. * * ADL5375-05: 500 mV ADL5375-15: 1500 mV
LO INPUT
The LO input is designed to be driven from a single-ended source. The LO source is ac-coupled through a series capacitor to the LOIP pin while the LOIN pin is ac-coupled to ground through a second capacitor. The typical LO drive level, which was used for the characterization of the ADL5375, is 0 dBm. Differential operation is also possible, in which case both sides of the differential LO source should be ac-coupled through a pair of series capacitors to the LOIP and LOIN pins.
BASEBAND INPUTS
The baseband inputs (IBBP, IBBN, QBBP, and QBBN) should be driven from a differential source. The nominal drive level used in the characterization of the ADL5375 is 1 V p-p differential (or 500 mV p-p on each pin).
RF OUTPUT
The RF output is available at the RFOUT pin (Pin 16), which can drive a 50 load. The internal balun provides a low dc path to ground. In most situations, the RFOUT pin must be ac-coupled to the load.
Rev. 0 | Page 20 of 32
07052-029
QBBN
QBBP
ADL5375
OUTPUT DISABLE
The ADL5375 incorporates an output disable pin feature that shuts down the output amplifier stage to isolate the modulator from the load. This feature is enabled (output is disabled) when the voltage on the DSOP exceeds 2 V. The feature is disabled (output not enabled) when the DSOP pin is either tied to ground or left unconnected. Asserting DSOP further reduces LO leakage (see Figure 27 and Figure 52) and drives the broadband noise of the device down to just above the KT (thermal) noise level. Asserting DSOP also reduces the supply current of the ADL5375 from 200 mA to 131 mA. The time delay between when the DSOP pin is forced to ground and the output power is restored is approximately 200 ns. The time delay between when the DSOP pin is forced to the positive supply voltage and the output shuts off is under 100 ns.
Rev. 0 | Page 21 of 32
ADL5375 OPTIMIZATION
The carrier feedthrough and sideband suppression performance of the ADL5375 can be improved by using optimization techniques. The same applies to the Q-channel. For the ADL5375-15, the same theory applies except that VIBBP = VIBBN = 1500 mV. It is often desirable to perform a one-time carrier null calibration. This is usually performed at a given frequency and the radio allowed to operate over a frequency range on each side of that frequency. The nulled carrier feedthrough level degrades somewhat as the LO frequency is moved away from the frequency at which the null was performed. This variation is very small across a 30 MHz or 60 MHz cellular band, however. This small variation is due to the effects of LO-to-RF output leakage around the package and on the board as the frequency changes. Despite the degradation, the LO leakage can be expected to be better than when no nulling is performed.
Carrier Feedthrough Nulling
Carrier feedthrough results from minute dc offsets that occur between each of the differential baseband inputs. In an ideal modulator, the quantities (VIBBP - VIBBN) and (VQBBP - VQBBN) are equal to zero, which results in no carrier feedthrough. In a real modulator, those two quantities are nonzero and, when mixed with the LO, result in a finite amount of carrier feedthrough. The ADL5375 is designed to provide a minimal amount of carrier feedthrough. Should even lower carrier feedthrough levels be required, minor adjustments can be made to the (VIBBP - VIBBN) and (VQBBP - V QBBN) offsets. The I-channel offset is held constant, while the Q-channel offset is varied until a minimum carrier feedthrough level is obtained. The Q-channel offset required to achieve this minimum is held constant, while the offset on the I-channel is adjusted until a new minimum is reached. Through two iterations of this process, the carrier feedthrough can be reduced to as low as the output noise. The ability to null is sometimes limited by the resolution of the offset adjustment. Figure 55 illustrates the typical relationship between carrier feedthrough and dc offset around the null.
-60 -64
CARRIER FEEDTHROUGH (dBm)
Sideband Suppression Optimization
Sideband suppression results from relative gain and relative phase offsets between the I-channel and Q-channel and can be suppressed through adjustments to those two parameters. Figure 56 illustrates how sideband suppression is affected by the gain and phase imbalances.
0 -10
SIDEBAND SUPPRESSION (dBc)
2.5dB -20 1.25dB -30 0.5dB 0.25dB -40 0.125dB -50 0.05dB 0.025dB -60 0.0125dB -70 0dB -80 -90 0.01
-68 -72 -76 -80 -84 -88 -300 -240 -180 -120
0.1
1 PHASE ERROR (Degrees)
10
100
-60
0
60
120
180
240
300
07052-030
VP - VN OFFSET (V)
Figure 56. Sideband Suppression vs. Quadrature Phase Error for Various Quadrature Amplitude Offsets
Figure 55. Example of Typical Carrier Feedthrough vs. DC Offset Voltage
Using the ADL5375-05 version as an example, note that throughout the nulling process, the dc bias for the baseband inputs remains at 500 mV. When no offset is applied, VIBBP = VIBBN = 500 mV, or VIBBP - VIBBN = VIOS = 0 V When an offset of +VIOS is applied to the I-channel inputs, VIBBP = 500 mV + VIOS/2, and VIBBN = 500 mV - VIOS/2, such that VIBBP - VIBBN = VIOS
Figure 56 underlines the fact that adjusting only one parameter improves the sideband suppression only to a point, unless the other parameter is also adjusted. For example, if the amplitude offset is 0.25 dB, improving the phase imbalance by better than 1 does not yield any improvement in the sideband suppression. For optimum sideband suppression, an iterative adjustment between phase and amplitude is required. The sideband suppression nulling can be performed either through adjusting the gain for each channel or through the modification of the phase and gain of the digital data coming from the baseband signal processor.
Rev. 0 | Page 22 of 32
07052-032
ADL5375 APPLICATIONS INFORMATION
DAC MODULATOR INTERFACING
Driving the ADL5375-05 with a TXDAC(R)
The ADL5375-05 is designed to interface with minimal components to members of the Analog Devices, Inc. TxDAC families. These dual-channel differential current output DACs feature an output current swing from 0 mA to 20 mA. The interface described in this section can be used with any DAC that has a similar output. An example of an interface using the AD9779 TxDAC is shown in Figure 57. The baseband inputs of the ADL5375-05 require a dc bias of 500 mV. The average output current on each of the outputs of the AD9779 is 10 mA. Therefore, a single 50 resistor to ground from each of the DAC outputs results in an average current of 10 mA flowing through each of the resistors, thus producing the desired 500 mV dc bias for the inputs to the ADL5375-05.
AD9779
OUT1_P 93 RBIP 50 92 RBIN 50 22 21
AD9779
OUT1_P 93 RBIP 50 92 RBIN 50 RSLI 100 22 21
ADL5375-05
IBBP
OUT1_N
IBBN
OUT2_N
84 RBQN 50 RBQP 50 83
9 RSLQ 100
QBBN
OUT2_P
QBBP
Figure 58. AC Voltage Swing Reduction Through the Introduction of a Shunt Resistor Between Differential Pair
ADL5375-05
IBBP
The value of this ac voltage swing limiting resistor is chosen based on the desired ac voltage swing. Figure 59 shows the relationship between the swing-limiting resistor and the peakto-peak ac swing that it produces when 50 bias-setting resistors are used.
2.0 1.8
DIFFERENTIAL SWING (V p-p)
OUT1_N
IBBN
1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 100 RL () 1000 10000
07052-035
OUT2_N
84 RBQN 50 RBQP 50 83
9
QBBN
OUT2_P
QBBP
Figure 57. Interface Between the AD9779 and ADL5375-05 with 50 Resistors to Ground to Establish the 500 mV DC Bias for the ADL5375-05 Baseband Inputs
07052-033
10
0 10
The AD9779 output currents have a swing that ranges from 0 mA to 20 mA. With the 50 resistors in place, the ac voltage swing going into the ADL5375-05 baseband inputs ranges from 0 V to 1 V. A full-scale sine wave out of the AD9779 can be described as a 1 V p-p single-ended (or 2 V p-p differential) sine wave with a 500 mV dc bias.
Figure 59. Relationship Between the AC Swing-Limiting Resistor and the Peak-to-Peak Voltage Swing with 50 Bias-Setting Resistors
Filtering
It is necessary to place an antialiasing filter between the DAC and modulator to filter out Nyquist images and broadband DAC noise. The interface for setting up the biasing and ac swing discussed in the Limiting the AC Swing section lends itself well to the introduction of such a filter. The filter can be inserted between the dc bias setting resistors and the ac swinglimiting resistor. Doing so establishes the input and output impedances for the filter. Figure 60 shows a third-order, Bessel low-pass filter with a 3 dB frequency of 10 MHz. Matching input and output impedances make the filter design easier, so the shunt resistor chosen is 100 , producing an ac swing of 1 V p-p differential. The frequency response of this filter is shown in Figure 61.
Limiting the AC Swing
There are situations in which it is desirable to reduce the ac voltage swing for a given DAC output current. This can be achieved through the addition of another resistor to the interface. This resistor is placed in the shunt between each side of the differential pair, as shown in Figure 58. It has the effect of reducing the ac swing without changing the dc bias already established by the 50 resistors.
Rev. 0 | Page 23 of 32
07052-034
10
ADL5375
AD9779
OUT1_P 93 RBIP 50 RBIN 92 50 53.62nF C1I LPI 771.1nH
ADL5375-05
21 RSLI 100 22 IBBN IBBP
AD9779
OUT1_P 93 RBIP 45.3 92 RBIN 45.3
RSIN 1k RLIP 3480 RSIP 1k RLIN 3480
ADL5375-15
21 IBBP
350.1pF C2I LNI 771.1nH
5V 22 IBBN
OUT1_N
OUT1_N
OUT2_N
84 RBQN 50 RBQP 83 50 53.62nF C1Q
LNQ 771.1nH
9 RSLQ 100
QBBN
OUT2_N
84 RBQN 45.3
RSQN 1k RLQN 3480 RSQP 1k RLQP 3480
9
QBBN
350.1pF C2Q
OUT2_P
LPQ 771.1nH
QBBP
07052-036
OUT2_P
QBBP
Figure 60. DAC Modulator Interface with 10 MHz Third-Order, Bessel Filter
0 MAGNITUDE -10 30 36
Figure 62. Passive Level-Shifting Network For Biasing ADL5375-15 from TxDAC
MAGNITUDE (dB)
-20 GROUP DELAY -30
24
GROUP DELAY (ns)
The active level shifting circuit involves the use of the ADA4938 dual-differential amplifier. This device has a VOCM pin that sets the output dc bias. Through this pin, the output commonmode of the amplifier can be easily set to the requisite 1.5 V for biasing the ADL5375-15 baseband inputs.
18
USING THE AD9779 AUXILIARY DAC FOR CARRIER FEEDTHROUGH NULLING
The AD9779 features an auxiliary DAC that can be used to inject small currents into the differential outputs for each main DAC channel. This feature can be used to produce the small offset voltages necessary to null out the carrier feedthrough from the modulator. Figure 63 shows the interface required to use the auxiliary DACs, which adds four resistors to the interface.
90 AUX1_P
-40
12
-50
6
1
10 FREQUENCY (MHz)
Figure 61. Frequency Response for DAC Modulator Interface with 10 MHz Third-Orde,r Bessel Filter
07052-037
-60
0 100
Driving the ADL5375-15 with a TXDAC
The ADL5375-15 requires a 1500 mV dc bias and therefore requires a slightly more complex interface that performs a dc level shift on the baseband signals. It is necessary to level-shift the DAC output from a 500 mV dc bias to the 1500 mV dc bias that the ADL5375-15 requires. Level-shifting can be achieved with either a passive network or an active circuit. A passive network of resistors is shown in Figure 62. In this network, the dc bias of the DAC remains at 500 mV while the input to the ADL5375-15 is 1500 mV. It should be noted that this passive level-shifting network introduces approximately 2 dB of loss in the ac signal.
AD9779
OUT1_P
500 93 RBIP 50 RBIN 92 50
250
LPI 771.1nH 350.1pF C2I LNI 771.1nH RSLI 100
ADL5375-05
21 IBBP
53.62nF C1I
OUT1_N
22 250
IBBN
AUX1_N
89 500
AUX2_N
87 500 250 LNQ 771.1nH
OUT2_N
84 RBQN 50 RBQP 83 50 53.62nF C1Q
9 RSLQ 100 10
QBBN
350.1pF C2Q LPQ 771.1nH
OUT2_P
QBBP
500
Figure 63. DAC Modulator Interface with Auxiliary DAC Resistors
Rev. 0 | Page 24 of 32
07052-038
AUX2_P
86
250
07052-086
10
83
RBQP 45.3
5V 10
ADL5375
GSM/EDGE OPERATION
The performance of the ADL5375 in a GSM/EDGE environment is shown in this section. Figure 64 illustrates the 6 MHz offset noise of the ADL5375-05 and the ADL5375-15 vs. output power at 940 MHz. Figure 65 demonstrates how the 6 MHz offset noise is affected by variations in LO drive level for both versions of the ADL5375 at 940 MHz.
-99 -60
ADJACENT AND ALTERNATE CHANNEL POWER RATIOS (dB)
-62 -64 -66 -68 -70 -72 -74 -76 -78 -80 -82 -16 -14 -12 -10 -8 -6 -4
07052-109 07052-100 07052-110
ADJACENT CPR
ALTERNATE CPR
6MHz OFFSET NOISE FLOOR (dBc/100kHz)
-100 -101 -102 -103 -104 -105 -106 -107
-84 -18
OUTPUT POWER (dBm)
Figure 66. ADL5375-05 Single-Carrier W-CDMA Adjacent and Alternate Channel Power vs. Output Power at 2140 MHz; LO Power = 0 dBm
-58
ADL5375-15
ADJACENT AND ALTERNATE CHANNEL POWER RATIOS (dB)
-60 -62 -64 -66 -68 -70 -72 -74 -76 -78 -80 -82 -20 -18 -16 -14 -12 -10 -8 -6 -4 ALTERNATE CPR ADJACENT CPR
ADL5375-05
-5
-4
-3
-2
-1
0
OUTPUT POWER (dBm)
Figure 64. GSM/Edge (8-PSK) 6 MHz Offset Noise at 940 MHz vs. Output Power, LO Drive = 0 dBm
-101
6MHz OFFSET NOISE FLOOR (dBc/100kHz)
-102 -103 -104 -105 -106 -107
07052-107
OUTPUT POWER (dBm)
Figure 67. ADL5375-15 Single-Carrier W-CDMA Adjacent and Alternate Channel Power vs. Output Power at 2140 MHz; LO Power = 0 dBm
ADL5375-15
Figure 66 and Figure 67 show that both versions of the ADL5375 are able to deliver about or better than -72 dB ACPR at an output power of -10 dBm. Figure 68 and Figure 69 illustrate the sensitivity of the EVM to variations in LO drive at 2140 MHz for the ADL5375-05 and ADL5375-15 respectively.
6.0 5.5
COMPOSITE AND SYMBOL EVM (%)
ADL5375-05
-108
07052-105
-109 0 1 2 3 4 5 6 7 LO DRIVE (dBm)
Figure 65. GSM/Edge (8-PSK) 6 MHz Offset Noise at 940 MHz vs. LO Drive, Output Power = 0 dBm
5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 0 -6 -4 -2
COMPOSITE EVM
W-CDMA OPERATION
The ADL5375 is suitable for W-CDMA operation. Figure 66 and Figure 67 show the adjacent and alternate channel power ratios for the ADL5375-05 and ADL5375-15, respectively, at an LO frequency of 2140 MHz.
SYMBOL EVM
0 LO DRIVE (dBm)
2
4
6
Figure 68. ADL5375-05 Single Carrier W-CDMA Composite and Symbol EVM vs. LO Drive at 2140 MHz; Output Power = -10 dBm
Rev. 0 | Page 25 of 32
ADL5375
6.0 5.5
COMPOSITE AND SYMBOL EVM (%)
Table 5. ADF4360-x Family Operating Frequencies
COMPOSITE EVM
5.0 4.5 4.0 3.5 3.0 2.5 2.0 1.5 1.0 0.5 -4 -2
SYMBOL EVM
Part ADF4360-0 ADF4360-1 ADF4360-2 ADF4360-3 ADF4360-4 ADF4360-5 ADF4360-6 ADF4360-7 ADF4360-8
2 4 6
07052-101
Output Frequency Range (MHz) 2400 to 2725 2050 to 2450 1850 to 2150 1600 to 1950 1450 to 1750 1200 to 1400 1050 to 1250 350 to 1800 65 to 400
0 -6
0 LO DRIVE (dBm)
TRANSMIT DAC OPTIONS
The AD9779 recommended in the previous sections of this data sheet is by no means the only DAC that can be used to drive the ADL5375. There are other appropriate DACs, depending on the level of performance required. Table 6 lists the dual TxDAC offered by Analog Devices. Table 6. Dual TxDAC Selection
Part AD9709 AD9761 AD9763 AD9765 AD9767 AD9773 AD9775 AD9777 AD9776 AD9778 AD9779 Resolution (Bits) 8 10 10 12 14 12 14 16 12 14 16 Update Rate (MSPS Minimum) 125 40 125 125 125 160 160 160 1000 1000 1000
Figure 69. ADL5375-15 Single Carrier W-CDMA Composite and Symbol EVM vs. LO Drive at 2140 MHz; Output Power = -10 dBm
The EVM exhibits moderate improvements with an increase in the LO drive.
LO GENERATION USING PLLS
Analog Devices has a line of PLLs that can be used for generating the LO signal. Table 4 lists the PLLs together with their maximum frequency and phase noise performance. Table 4. Analog Devices PLL Selection
Part ADF4110 ADF4111 ADF4112 ADF4113 ADF4116 ADF4117 ADF4118 Frequency, fIN (MHz) 550 1200 3000 4000 550 1200 3000 Phase Noise @ 1 kHz Offset and 200 kHz PFD (dBc/Hz) -91 @ 540 MHz -87 @ 900 MHz -90 @ 900 MHz -91 @ 900 MHz -89 @ 540 MHz -87 @ 900 MHz -90 @ 900 MHz
All DACs listed have nominal bias levels of 0.5 V and use the same simple DAC modulator interface that is shown in Figure 60.
The ADF4360-x comes as a family of chips with nine operating frequency ranges. Choose chips depending on the local oscillator frequency required. While the use of the integrated synthesizer may come at the expense of slightly degraded noise performance from the ADL5375, it can be a cheaper alternative to a separate PLL and VCO solution. Table 5 shows the options available.
MODULATOR/DEMODULATOR OPTIONS
Table 7 lists other Analog Devices modulators and demodulators. Table 7. Modulator/Demodulator Options
Part No. AD8345 AD8346 AD8349 ADL5390 ADL5385 ADL5370 ADL5371 ADL5372 ADL5373 ADL5374 AD8347 AD8348 ADL5387 AD8340 AD8341 Modulator/ Demodulator Modulator Modulator Modulator Modulator Modulator Modulator Modulator Modulator Modulator Modulator Demodulator Demodulator Demodulator Vector modulator Vector modulator Frequency Range (MHz) 140 to 1000 800 to 2500 700 to 2700 20 to 2400 50 to 2200 300 to 1000 500 to 1500 1500 to 2500 2300 to 3000 3000 to 4000 800 to 2700 50 to 1000 50 to 2000 700 to 1000 1500 to 2400 Comments
External quadrature
Rev. 0 | Page 26 of 32
ADL5375 EVALUATION BOARD
Populated RoHS-compliant evaluation boards are available for evaluation of both versions of the ADL5375. The ADL5375 package has an exposed paddle on the underside. This exposed paddle should be soldered to the board for good thermal and electrical grounding. The evaluation board is designed without any components on the underside, so heat can be applied to the underside for easy removal and replacement of the ADL5375 should it be necessary. Both versions of the ADL5375 share the same evaluation board and schematic. To differentiate the boards from each other, the silkscreen on the underside of the board has a table that is marked to indicate which version (-05 or -15) is populated on the board.
IBBP R1 0 R8 OPEN R7 OPEN R2 0 R9 OPEN
IBBN
VPOS VPOS S1 A R15 49.9 LOIP C7 R16 OPEN 1000pF LOIN R17 0 B
23 COMM
COMM
20
24
22
21
19
COMM
VPS2
IBBN
IBBP
C5 0.1F
C3 1000pF
R6 10k
DSOP COMM LOIP LOIN COMM NC
C6 1000pF
1 2 3 4 5 6
18
VPS1 COMM RFOUT COMM
C2 1000pF
C4 0.1F
VPOS
Z1 ADL5375
17 16
RFOUT C1 1000pF
15 NC 14
EXPOSED PADDLE
13 NC
10
11
COMM
COMM
R5 OPEN VPOS
COMM
QBBN
NC
QBBP
12
7
8
9
GND R11 OPEN R3 0 QBBN R12 OPEN R10 OPEN R4 0 QBBP
07052-047
Figure 70. ADL5375 Evaluation Board Schematic
Table 8. Evaluation Board Description and Configuration Options
Component VPOS, GND Test Points S1 Switch R1 to R4, R7 to R12 LOIP SMA, R16, R17 LOIN SMA, R16, R17 Description Power Supply and Ground test points for clip leads DSOP Output Disable Select Baseband input filtering components Single-ended local oscillator input Optional SMA for differential LO input Default Condition/Option Settings Red = 5 V, black = GND Position A = output enabled Position B = output disabled R1 to R4 = 0 (0402) R7 to R12 = open (0402) R16 = open, R17 = 0 (0402) R16 = 0 (0402), R17 = open
Rev. 0 | Page 27 of 32
ADL5375
Ping Toh
THERMAL GROUNDING AND EVALUATION BOARD LAYOUT
The package for the ADL5375 features an exposed paddle on the underside that should be well soldered to a low thermal and electrical impedance ground plane. This paddle is typically soldered to an exposed opening in the solder mask on the evaluation board. Figure 73 illustrates the dimensions used in the layout of the ADL5735 footprint on the ADL5375 evaluation board (1 mil. = 0.0254 mm). Notice the use of nine via holes on the exposed paddle. These ground vias should be connected to all other ground layers on the evaluation board to maximize heat dissipation from the device package.
12 mil.
Figure 71. Evaluation Board Layout, Top Layer
82 mil.
07052-048
25 mil.
23 mil.
12 mil.
19.7 mil. 98.4 mil. 133.8 mil.
07052-046
Figure 73. Dimensions for Evaluation Board Layout for the ADL5375 Package
Under these conditions, the thermal impedance of the ADL5375 was measured to be approximately 30C/W in still air.
Figure 72. Evaluation Board Layout, Bottom Layer
Rev. 0 | Page 28 of 32
07052-051
ADL5375 CHARACTERIZATION SETUP
AEROFLEX IFR 3416 250kHz TO 6GHz SIGNAL GENERATOR FREQ 4MHz LEVEL 0dBm BIAS 0.5V GAIN 0.7V BIAS 0.5V GAIN 0.7V RF OUT LO ROHDE & SCHWARTZ SPECTRUM ANALYZER FSU 20Hz TO 8GHz
CONNECT TO BACK OF UNIT I OUT I/AM Q OUT Q/FM 90 AGILENT 34401A MULTIMETER 0.175 ADC IP VPOS +5V AGILENT E3631A POWER SUPPLY IN QP OUT QN VPOS GND 5.000 0.175A F-MOD LO I Q 0
+6dBm
RF IN
F-MOD TEST SETUP
OUTPUT
6V
25V
07052-049
+
-
+ COM -
Figure 74. Characterization Bench Setup
The primary setup used to characterize the ADL5375 is shown in Figure 74. This setup was used to evaluate the product as a single-sideband modulator. The Aeroflex signal generator supplied the LO and differential I and Q baseband signals to the device under test (DUT). The typical LO drive was 0 dBm. The I-channel is driven by a sine wave, and the Q-channel is driven by a cosine wave. The lower sideband is the single-sideband (SSB) output.
The majority of characterization for the ADL5375 was performed using a 1 MHz sine wave signal with a 500 mV (ADL5375-05) or 1500 mV (ADL5375-15) common-mode voltage applied to the baseband signals of the DUT. The baseband signal path was calibrated to ensure that the VIOS and VQOS offsets on the baseband inputs were minimized as close as possible to 0 V before connecting to the DUT. See the Carrier Feedthrough Nulling section for the definitions of VIOS and VQOS.
Rev. 0 | Page 29 of 32
ADL5375
TEKTRONIX AFG3252 DUAL FUNCTION ARBITRARY FUNCTION GENERATOR ROHDE & SCHWARTZ SMT 06 SIGNAL GENERATOR RF OUT
CH1 OUTPUT
CH1 1MHz AMPL 700mV p-p PHASE 0 CH2 1MHz AMPL 700mV p-p PHASE 90 0 AGILENT E3631A POWER SUPPLY
CH2 OUTPUT
FREQ 4MHz TO 4GHz LEVEL 0dBm
IQ
90 SINGLE-TO-DIFFERENTIAL CIRCUIT BOARD
LO
F-MOD TEST RACK 5.000 0.350A Q IN AC F-MOD CHAR BD GND IP IP IN QP OUT OUTPUT LO
VPOS + - +5V
6V
+ COM -
25V
Q IN DCCM TSEN VPOSB VPOSA IN AGND IN1 IN1 VP1 QP QN
+5V VPOS +5V AGILENT E3631A POWER SUPPLY
-5V
VN1 I IN DCCM I IN AC
QN GND VPOS
ROHDE & SCHWARTZ FSEA 30 SPECTRUM ANALYZER 0.500 0.010A
+
6V
-
+ COM -
25V
RF IN 100MHz TO 4GHz +6dBm
VCM = 0.5V AGILENT 34401A MULTIMETER
Figure 75. Setup for Baseband Frequency Sweep and Undesired Sideband Nulling
The setup used to evaluate baseband frequency sweep and undesired sideband nulling of the ADL5375 is shown in Figure 75. The interface board has circuitry that converts the single-ended I input and Q input from the arbitrary function generator to differential I and Q baseband signals with a dc bias of 500 mV
(ADL5375-05) or 1500mV (ADL5375-15). Undesired sideband nulling was achieved through an iterative process of adjusting amplitude and phase on the Q-channel. See the Sideband Suppression Optimization section for a detailed description on sideband nulling.
Rev. 0 | Page 30 of 32
07052-050
0.200 ADC
ADL5375 OUTLINE DIMENSIONS
4.00 BSC SQ 0.60 MAX 0.60 MAX 0.50 BSC 0.50 0.40 0.30 1.00 0.85 0.80 12 MAX 0.80 MAX 0.65 TYP
19 18 EXPOSED PAD 24 1
PIN 1 INDICATOR 2.65 2.50 SQ 2.35
6
PIN 1 INDICATOR
TOP VIEW
3.75 BSC SQ
(BO TTOMVIEW)
13 12
7
0.23 MIN 2.50 REF
0.05 MAX 0.02 NOM 0.20 REF COPLANARITY 0.08
SEATING PLANE
0.30 0.23 0.18
COMPLIANT TO JEDEC STANDARDS MO-220-VGGD-8
Figure 76. 24-Lead Lead Frame Chip Scale Package [LFCSP_VQ] 4 mm x 4 mm Body, Very Thin Quad (CP-24-3) Dimensions shown in millimeters
ORDERING GUIDE
Model ADL5375-05ACPZ-R7 1 ADL5375-05ACPZ-WP1 ADL5375-05-EVALZ1 ADL5375-15ACPZ-R71 ADL5375-15ACPZ-WP1 ADL5375-15-EVALZ1
1
Temperature Range -40C to +85C -40C to +85C -40C to +85C -40C to +85C
Package Description 24-Lead LFCSP_VQ, 7" Tape and Reel 24-Lead LFCSP_VQ, Waffle Pack Evaluation Board 24-Lead LFCSP_VQ, 7" Tape and Reel 24-Lead LFCSP_VQ, Waffle Pack Evaluation Board
Package Option CP-24-3 CP-24-3 CP-24-3 CP-24-3
Ordering Quantity 1,500 64 1,500 64
Z = RoHS Compliant Part/Evaluation Board.
Rev. 0 | Page 31 of 32
ADL5375 NOTES
(c)2007 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D07052-0-12/07(0)
Rev. 0 | Page 32 of 32

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